LEGv8 Single-Cycle Simulator

Frame

Assembly Instruction

Machine Language Instruction

Speed: 75%

Code

📄 Import code

// --- Initialization (I-Type) ---
ADDI  X1, XZR, #50      // X1 = 50
ADDI  X2, XZR, #25      // X2 = 25
ADDI  X20, XZR, #100    // Base address = 100

// --- Arithmetic (R-Type & Flag Setting) ---
ADD   X3, X1, X2        // X3 = 75
SUB   X4, X1, X2        // X4 = 25
ADDS  X5, X1, X2        // X5 = 75; Flags: 0
SUBS  XZR, X4, X2       // XZR = 0; Flags: Z=1

// --- Conditional Branch (B.cond) ---
B.EQ  Flags_Are_Equal   // Z=1 → Branch taken
ADDI  X9, XZR, #999     // Skipped

Flags_Are_Equal:
ADDI  X9, XZR, #111     // X9 = 111

SUBS  XZR, X1, XZR      // X1 = 50 → Z=0
B.LT  Should_Not_Happen // Not taken (N=V)
ADDI  X9, X9, #1        // X9 = 112

Should_Not_Happen:
ADDI  X9, XZR, #404     // Skipped

// --- Logical Ops (R & I-Type) ---
ORR   X10, X3, X4       // X10 = 95
AND   X11, X3, X4       // X11 = 9
EOR   X12, X10, X11     // X12 = 86
ANDS  XZR, X10, XZR     // 95 & 0; Z=1
ADDI  X1, XZR, #10
ANDI  X1, X1, #15   
ORRI  X2, X1, #100  
EORI  X3, X2, #10   

// --- Memory Access (D-Type) ---
STUR  X12, [XZR, #16]   // Store at addr 16
LDUR  X13, [XZR, #16]   // Load 16 → X13

// --- Conditional Branch (CB-Type) ---
SUBIS X15, X13, #86     // X15 = 0; Z=1
CBNZ  X15, Skip_This    // Not taken
ADDI  X14, XZR, #333    // X14 = 333

Skip_This:
ADDI  X14, XZR, #444    // Skipped

CBNZ  X14, Go_To_End    // Taken (X14 ≠ 0)
ADDI  X1, XZR, #555     // Skipped

// --- Branch & Link (BL), Uncond Branch ---
Go_To_End:
BL    Print_Message     // Call subroutine;

After_Return:
B     Halt_Loop         // Jump to end

Print_Message:
ADDI  X25, XZR, #1      // Simulate work
B     After_Return      // Return manually

Halt_Loop:
B     Halt_Loop         // Infinite loop (end)

Log

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Flags

N
0

Z
0

C
0

V
0

Registers

X00	X01	X02	X03	X04	X05	X06	X07
0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000

X08	X09	X10	X11	X12	X13	X14	X15
0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000

X16	X17	X18	X19	X20	X21	X22	X23
0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000

X24	X25	X26	X27	X28	X29	X30	XZR
0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000	0x00000000

Data memory

Address	Value
0x0000	0x0000
0x0008	0x0000
0x0010	0x0000
0x0018	0x0000
0x0020	0x0000
0x0028	0x0000
0x0030	0x0000
0x0038	0x0000
0x0040	0x0000
0x0048	0x0000
0x0050	0x0000
0x0058	0x0000
0x0060	0x0000
0x0068	0x0000
0x0070	0x0000
0x0078	0x0000
0x0080	0x0000
0x0088	0x0000
0x0090	0x0000
0x0098	0x0000
0x00A0	0x0000
0x00A8	0x0000
0x00B0	0x0000
0x00B8	0x0000
0x00C0	0x0000
0x00C8	0x0000
0x00D0	0x0000
0x00D8	0x0000
0x00E0	0x0000
0x00E8	0x0000
0x00F0	0x0000
0x00F8	0x0000
0x0100	0x0000
0x0108	0x0000
0x0110	0x0000
0x0118	0x0000
0x0120	0x0000
0x0128	0x0000
0x0130	0x0000
0x0138	0x0000
0x0140	0x0000
0x0148	0x0000
0x0150	0x0000
0x0158	0x0000
0x0160	0x0000
0x0168	0x0000
0x0170	0x0000
0x0178	0x0000
0x0180	0x0000
0x0188	0x0000
0x0190	0x0000
0x0198	0x0000
0x01A0	0x0000
0x01A8	0x0000
0x01B0	0x0000
0x01B8	0x0000
0x01C0	0x0000
0x01C8	0x0000
0x01D0	0x0000
0x01D8	0x0000
0x01E0	0x0000
0x01F8	0x0000
0x01F0	0x0000
0x01E8	0x0000

LEGv8 Visual Simulator

Frame

Code

Log

Flags

Registers

Data memory